From d5d095c80591b2d80ea9169828d5d0e6febda077 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Sun, 6 Apr 2025 02:00:19 +0200 Subject: [PATCH 478/484] phy: rockchip: inno-usb2: Add support for RK3506 Adapted from BSP. Signed-off-by: Ondrej Jirman --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 7e0c2f5f6bcc..6b5cd1ea623c 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -1594,6 +1594,31 @@ static int rk3128_usb2phy_tuning(struct rockchip_usb2phy *rphy) BIT(2) << BIT_WRITEABLE_SHIFT | 0); } +static int rk3506_usb2phy_tuning(struct rockchip_usb2phy *rphy) +{ + int ret = 0; + + /* Turn off otg0 port differential receiver in suspend mode */ + phy_clear_bits(rphy->phy_base + 0x30, BIT(2)); + + /* Turn off otg1 port differential receiver in suspend mode */ + phy_clear_bits(rphy->phy_base + 0x430, BIT(2)); + + /* Set otg0 port HS eye height to 425mv(default is 450mv) */ + phy_update_bits(rphy->phy_base + 0x30, GENMASK(6, 4), (0x05 << 4)); + + /* Set otg1 port HS eye height to 425mv(default is 450mv) */ + phy_update_bits(rphy->phy_base + 0x430, GENMASK(6, 4), (0x05 << 4)); + + /* Choose the Tx fs/ls data as linestate from TX driver for otg0 port */ + phy_update_bits(rphy->phy_base + 0x94, GENMASK(6, 3), (0x03 << 3)); + + /* Choose the Tx fs/ls data as linestate from TX driver for otg1 port */ + phy_update_bits(rphy->phy_base + 0x494, GENMASK(6, 3), (0x03 << 3)); + + return ret; +} + static int rk3576_usb2phy_tuning(struct rockchip_usb2phy *rphy) { int ret; @@ -1976,6 +2001,95 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { { /* sentinel */ } }; +static const struct rockchip_usb2phy_cfg rk3506_phy_cfgs[] = { + { + .reg = 0xff2b0000, + .num_ports = 2, + .phy_tuning = rk3506_usb2phy_tuning, + //.vbus_detect = rockchip_usb2phy_vbus_det_control, + //.clkout_ctl_phy = { 0x041c, 7, 2, 0, 0x27 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0060, 8, 0, 0, 0x1d1 }, + .bvalid_det_en = { 0x0150, 2, 2, 0, 1 }, + .bvalid_det_st = { 0x0154, 2, 2, 0, 1 }, + .bvalid_det_clr = { 0x0158, 2, 2, 0, 1 }, + .bvalid_grf_sel = { 0x0060, 14, 14, 0, 1 }, + //.bvalid_grf_con = { 0x0060, 15, 14, 1, 3 }, + //.iddig_output = { 0x0060, 10, 10, 0, 1 }, + //.iddig_en = { 0x0060, 9, 9, 0, 1 }, + .idfall_det_en = { 0x0150, 5, 5, 0, 1 }, + .idfall_det_st = { 0x0154, 5, 5, 0, 1 }, + .idfall_det_clr = { 0x0158, 5, 5, 0, 1 }, + .idrise_det_en = { 0x0150, 4, 4, 0, 1 }, + .idrise_det_st = { 0x0154, 4, 4, 0, 1 }, + .idrise_det_clr = { 0x0158, 4, 4, 0, 1 }, + .ls_det_en = { 0x0150, 0, 0, 0, 1 }, + .ls_det_st = { 0x0154, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0158, 0, 0, 0, 1 }, + .disfall_en = { 0x0150, 7, 7, 0, 0 }, + .disfall_st = { 0x0154, 7, 7, 0, 1 }, + .disfall_clr = { 0x0158, 7, 7, 0, 1 }, + .disrise_en = { 0x0150, 6, 6, 0, 0 }, + .disrise_st = { 0x0154, 6, 6, 0, 1 }, + .disrise_clr = { 0x0158, 6, 6, 0, 1 }, + .utmi_avalid = { 0x0118, 1, 1, 0, 1 }, + .utmi_bvalid = { 0x0118, 0, 0, 0, 1 }, + //.utmi_iddig = { 0x0118, 6, 6, 0, 1 }, + .utmi_ls = { 0x0118, 5, 4, 0, 1 }, + .utmi_hstdet = { 0x0118, 7, 7, 0, 1 }, + //.vbus_det_en = { 0x003c, 15, 15, 1, 0 }, + //.port_ls_filter_con = { 0x0160, 19, 0, 0x30100, 0x20 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0070, 8, 0, 0, 0x1d1 }, + .bvalid_det_en = { 0x0170, 2, 2, 0, 1 }, + .bvalid_det_st = { 0x0174, 2, 2, 0, 1 }, + .bvalid_det_clr = { 0x0178, 2, 2, 0, 1 }, + .bvalid_grf_sel = { 0x0070, 14, 14, 0, 1 }, + //.bvalid_grf_con = { 0x0070, 15, 14, 1, 3 }, + //.iddig_output = { 0x0070, 10, 10, 0, 1 }, + //.iddig_en = { 0x0070, 9, 9, 0, 1 }, + .idfall_det_en = { 0x0170, 5, 5, 0, 1 }, + .idfall_det_st = { 0x0174, 5, 5, 0, 1 }, + .idfall_det_clr = { 0x0178, 5, 5, 0, 1 }, + .idrise_det_en = { 0x0170, 4, 4, 0, 1 }, + .idrise_det_st = { 0x0174, 4, 4, 0, 1 }, + .idrise_det_clr = { 0x0178, 4, 4, 0, 1 }, + .ls_det_en = { 0x0170, 0, 0, 0, 1 }, + .ls_det_st = { 0x0174, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0178, 0, 0, 0, 1 }, + .disfall_en = { 0x0170, 7, 7, 0, 0 }, + .disfall_st = { 0x0174, 7, 7, 0, 1 }, + .disfall_clr = { 0x0178, 7, 7, 0, 1 }, + .disrise_en = { 0x0170, 6, 6, 0, 0 }, + .disrise_st = { 0x0174, 6, 6, 0, 1 }, + .disrise_clr = { 0x0178, 6, 6, 0, 1 }, + .utmi_avalid = { 0x0118, 9, 9, 0, 1 }, + .utmi_bvalid = { 0x0118, 8, 8, 0, 1 }, + //.utmi_iddig = { 0x0118, 14, 14, 0, 1 }, + .utmi_ls = { 0x0118, 13, 12, 0, 1 }, + .utmi_hstdet = { 0x0118, 15, 15, 0, 1 }, + //.vbus_det_en = { 0x043c, 15, 15, 1, 0 }, + //.port_ls_filter_con = { 0x0180, 19, 0, 0x30100, 0x20 }, + } + }, + .chg_det = { + //.chg_mode = { 0x0060, 8, 0, 0, 0x1d7 }, + .cp_det = { 0x0118, 19, 19, 0, 1 }, + .dcp_det = { 0x0118, 18, 18, 0, 1 }, + .dp_det = { 0x0118, 20, 20, 0, 1 }, + .idm_sink_en = { 0x006c, 1, 1, 0, 1 }, + .idp_sink_en = { 0x006c, 0, 0, 0, 1 }, + .idp_src_en = { 0x006c, 2, 2, 0, 1 }, + .rdm_pdwn_en = { 0x006c, 3, 3, 0, 1 }, + .vdm_src_en = { 0x006c, 5, 5, 0, 1 }, + .vdp_src_en = { 0x006c, 4, 4, 0, 1 }, + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { { .reg = 0xfe8a0000, @@ -2342,6 +2456,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = { { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs }, { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs }, { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs }, + { .compatible = "rockchip,rk3506-usb2phy", .data = &rk3506_phy_cfgs }, { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs }, { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs }, { .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs }, -- 2.49.0