From 377392b6e51b25b675f6c8fa200eb47406cd184a Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sat, 11 Jan 2025 21:20:42 +0100
Subject: [PATCH 452/484] arm64: dts: rk3588-orangepi-5-plus: Lower SPI
 frequency to 50 MHz

100 MHz doesn't work well. Read transactions seem to return 0 byte
at the beginning with 100 MHz clock.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
 arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
index 121e4d1c3fa5..4c421dc6fbaa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
@@ -326,6 +326,11 @@
 &sfc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&fspim1_pins>;
+
+};
+
+&spi_flash {
+	spi-max-frequency = <50000000>;
 };
 
 &u2phy1_otg {
-- 
2.49.0

