From e68ca0c6527503d4a4dc580be80e1ca5d38485e0 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Mon, 24 Jun 2024 23:56:28 +0200 Subject: [PATCH 462/480] nvmem: rockchip-otp: Add support for RV1106 SoC Allow this driver to access OTP on RV1106/3. Signed-off-by: Ondrej Jirman --- drivers/nvmem/rockchip-otp.c | 81 ++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index ebc3f0b24166..fb64a8002b70 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -28,6 +28,7 @@ #define OTPC_USER_ADDR 0x0104 #define OTPC_USER_ENABLE 0x0108 #define OTPC_USER_Q 0x0124 +#define OTPC_USER_QP 0x0120 #define OTPC_INT_STATUS 0x0304 #define OTPC_SBPI_CMD0_OFFSET 0x1000 #define OTPC_SBPI_CMD1_OFFSET 0x1004 @@ -53,6 +54,7 @@ #define SBPI_ENABLE_MASK GENMASK(16, 16) #define OTPC_TIMEOUT 10000 +#define RK3568_NBYTES 2 /* RK3588 Register */ #define RK3588_OTPC_AUTO_CTRL 0x04 @@ -230,6 +232,70 @@ read_end: return ret; } +static int rk3568_otp_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct rockchip_otp *otp = context; + unsigned int addr_start, addr_end, addr_offset, addr_len; + unsigned int otp_qp; + u32 out_value; + u8 *buf; + int ret = 0, i = 0; + + addr_start = rounddown(offset, RK3568_NBYTES) / RK3568_NBYTES; + addr_end = roundup(offset + bytes, RK3568_NBYTES) / RK3568_NBYTES; + addr_offset = offset % RK3568_NBYTES; + addr_len = addr_end - addr_start; + + buf = kzalloc(array_size(addr_len, RK3568_NBYTES), GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = rockchip_otp_reset(otp); + if (ret) { + dev_err(otp->dev, "failed to reset otp phy\n"); + goto out; + } + + ret = rockchip_otp_ecc_enable(otp, true); + if (ret < 0) { + dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); + return ret; + } + + writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + udelay(5); + while (addr_len--) { + writel(addr_start++ | OTPC_USER_ADDR_MASK, + otp->base + OTPC_USER_ADDR); + writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, + otp->base + OTPC_USER_ENABLE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE); + if (ret < 0) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + otp_qp = readl(otp->base + OTPC_USER_QP); + if (((otp_qp & 0xc0) == 0xc0) || (otp_qp & 0x20)) { + ret = -EIO; + dev_err(otp->dev, "ecc check error during read setup\n"); + goto read_end; + } + out_value = readl(otp->base + OTPC_USER_Q); + memcpy(&buf[i], &out_value, RK3568_NBYTES); + i += RK3568_NBYTES; + } + + memcpy(val, buf + addr_offset, bytes); + +read_end: + writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); +out: + kfree(buf); + + return ret; +} + static int rockchip_otp_read(void *context, unsigned int offset, void *val, size_t bytes) { @@ -263,6 +329,17 @@ static struct nvmem_config otp_config = { .reg_read = rockchip_otp_read, }; +static const char * const rv1106_otp_clocks[] = { + "usr", "sbpi", "apb", "phy", "arb", "pmc", +}; + +static const struct rockchip_data rv1106_data = { + .size = 0x80, + .clks = rv1106_otp_clocks, + .num_clks = ARRAY_SIZE(rv1106_otp_clocks), + .reg_read = rk3568_otp_read, +}; + static const char * const px30_otp_clocks[] = { "otp", "apb_pclk", "phy", }; @@ -286,6 +363,10 @@ static const struct rockchip_data rk3588_data = { }; static const struct of_device_id rockchip_otp_match[] = { + { + .compatible = "rockchip,rv1106-otp", + .data = &rv1106_data, + }, { .compatible = "rockchip,px30-otp", .data = &px30_data, -- 2.49.0